A plurality of memory circuits is currently being manufactured by the semiconductor industry. One memory circuit is known as a dynamic random access memory (DRAM). DRAMs are made of many DRAM cells. A popular DRAM cell is known as the one transistor DRAM cell. This popular DRAM cell has a single transistor and a single capacitor connected in series. The capacitor stores a logic one or a logic zero known as a bit, and the transistor allows for both selective reading and writing of the capacitor. The capacitor in a DRAM cell slowly discharges over time and must be occasionally "refreshed" or rewritten to a logic zero or logic one in order to hold a logic value for a long period of time. DRAM cells, due to the fact that only one transistor and one capacitor are needed, tend to take up a small surface area. A cell with a small surface area allows for memory integrated circuits with millions of bits of storage.
Another form of a semiconductor memory is a static random access memory (SRAM). An SRAM is formed by connecting two inverters in a ring configuration. The output of a first inverter is connected to the input of a second inverter, and the output of the second inverter is connected to the input of the first inverter. A pair of pass transistors allows for selective read and write access to the SRAM cell. The SRAM cell, unlike the DRAM cell, is internally stable and therefore needs no refreshing. SRAM cells require a minimum of six elements, for example six transistors, and therefore have a larger surface area than a DRAM cell. Both DRAM cells and SRAM cells lose all stored information if power is lost or removed from the memory cell.
Another form of memory is referred to as a nonvolatile memory. Two popular forms of nonvolatile memory are erasable programmable read only memory (EPROM) or electrically erasable programmable read only memory (EEPROM). An EPROM or an EEPROM memory cell has a transistor with a floating gate and a control gate. The floating gate controls current flow between a source and a drain of the memory cell. The control gate programs the floating gate to an "on" or "off" state, also referred to as a logic one or logic zero state, via predetermined voltage settings. Both the EPROM cell and the EEPROM cell are physically larger than the DRAM cell in terms of surface area, but the EPROM and EEPROM cells retain all stored information if a power supply voltage fails or is removed.
Magnetic memory has been used for computers and like applications for many years. Ferromagnetic cores, rings, or cylinders are positioned in a predetermined array. The ferromagnetic cores, rings, or cylinders are physically large and are most likely much larger than any of the previously mentioned semiconductor memory devices. Three conductive lines pass through the center of each of the ferromagnetic cores in the predetermined array. A first conductive line runs horizontal and is a row decoder line. A second conductive line runs vertical and is a column decoder line. A third conductive line senses the stored polarity in a predetermined ferromagnetic core.
To program and erase a ferromagnetic core to a logic zero or a logic one, a current I.sub.1 having a direction (polarity) is flowed through the row decoder line and a current I.sub.2 having a direction (polarity) is flowed through the column decoder line. Usually, I.sub.1 is equal to I.sub.2. All cores not on the row or the column which is carrying the current I.sub.1 or I.sub.2 are subjected to a net current of zero and are not affected. All cores on either a row or a column but not both are subjected to either a current I.sub.1 or I.sub.2 and are not affected. The core that has both row and column decoder lines through it is subjected to a current of I.sub.1 plus I.sub.2 and is either programmed or erased depending on the direction (polarity) of the currents I.sub.1 and I.sub.2. Therefore, by respectively applying a row and column current I.sub.1 and I.sub.2, only one ferromagnetic core is selected with a large enough current to store or alter information. The magnetic cores tend to be physically large but are robust and more error-free than DRAMs for example.